The invention relates to management of speculation in a multiprocessor system, and in particular to cache addressing in this context.
Prior multiprocessor systems have introduced the idea of executing software threads in parallel. Sometimes the individual core processors of a multiprocessor system have had actual circuitry supporting thread level execution. Such circuitry is called hardware threading. The following document relates to the concept of simultaneous multithreading, i.e., more than one thread per core:    Tullsen, D. M., Eggers, S. J., and Levy, H. M. 1995, “Simultaneous multithreading: maximizing on-chip parallelism,” in Proceedings of the 22nd Annual international Symposium on Computer Architecture (S. Margherita Ligure, Italy, Jun. 22-24, 1995). ISCA '95. ACM, New York, N.Y., 392-403, DOI=http://doi.acm.org/10.1145/223982.224449
Multithreading allows a program to be broken up into segments that are known to be independent and to execute them in concurrently by multiple hardware threads. Also, for known dependencies, segments can be executed overlapped with synchronization honoring the dependencies.
The state of the art approach to executing threads speculatively allows segments with dependencies not known at compile time to be executed concurrently, with hardware tracking and insuring compliance with potential dependencies. This approach involves keeping track of thread meta data in the core and storing the results of speculative execution in main memory, under control of the core, until speculation was resolved. After speculation was resolved, speculative results would either become committed or be deleted. This approach requires core modules that are customized to the particular parallel processing system. Accordingly, for each new generation of parallel processing system, a new core has to be researched and developed.